1. Field of the Invention
The invention relates in general to a semiconductor structure having a multilayer of polysilicon (poly-Si) and a display panel applied with the same, and more particularly to a semiconductor structure having a multilayer of polysilicon with a specific direction of the grain boundary and a low surface roughness, and a display panel applied with the semiconductor structure.
2. Description of the Related Art
Organic electroluminescent flat panel displays are current-driven elements and the methods for driving the elements may be classified into a passive matrix method and an active matrix method. The active organic light emitting diode (AMOLED) uses a thin film transistor (TFT) in conjunction with a capacitance storage device to control the luminance and gray-scale behaviors of the organic light emitting diode (OLED).
Generally speaking, the manufacturing cost and technological level of the passive organic light emitting diode (PMOLED) is lower. However, the resolution cannot be increased under the limitation of the poor driving current efficiency. In addition, the pixel selected by the scan line is lighted but its luminance cannot be held under the driven mode. Thus, the dimension of the application product is restricted within 5 inches. Due to the capacitance storage signal in the active organic light emitting diode, a pixel still can be held at the original luminance after the scan line has scanned the pixel. So, the OLED does not have to be driven to a very high luminance, and a better lifetime behavior and the high resolution requirement can be achieved. Furthermore, the driving current efficiency of the active organic light emitting diode is more superior to that of the passive organic light emitting diode, and the pixels and electric elements TFTs can be integrated on a glass substrate.
The technology of growing TFTs on the glass substrate may include an amorphous silicon (a-Si) process and a low-temperature polysilicon (LTPS) process. The maximum difference between the LTPS TFT and the a-Si TFT resides in the electric property and the complication of the process. The LTPS TFT possesses a higher carrier mobility, which means that the TFT can provide a more sufficient current but its process is more complicated. On the contrary, the a-Si TFT has poorer carrier mobility but a simpler process than the LTPS TFT.
In the aspect of converting the amorphous silicon into the polysilicon, several crystallizing methods, such as the excimer laser annealing (ELA) technology, the continuous grain silicon (CGS) technology, the sequential lateral solidification (SLS) technology and the metal induced lateral crystallization (MILC) technology, have been developed. The adopted lasers also have many types, such as the excimer laser, the continuous wave (CW) laser, the laser beam pulse, and the like. Compared to the excimer laser annealing method, using the continuous wave laser annealing method can obtain a polysilicon film with a larger die dimension. In general, the larger die has higher carrier mobility. For example, the n-type element has the carrier mobility as high as about 566 cm2/s-V. Thus, in the aspect of converting the amorphous silicon into the polysilicon, the continuous wave laser technology has been greatly noted.
However, it is difficult to control the grain boundary of the polysilicon die formed using the continuous wave laser (CW Laser) annealing method, and the surface of the polysilicon layer is very rough (refer to the attached FIG. 1(a) and the attached FIG. 2(a)), which greatly influences the electric property of the application element. Taking an active layer of a TFT (Thin Film Transistor) element as an example, if the surface of the polysilicon layer in the active layer is very rough (i.e. the surface is uneven), when a gate oxide layer is formed above the polysilicon layer, the oxide layer structure close to the protrusion of the polysilicon layer is changed such that the oxide layer tends to be etched through and the polysilicon layer is exposed during the subsequent etching process. In addition, when a voltage is applied to the TFT, the point discharge phenomenon tends to occur at the protrusion on the rough surface of the polysilicon layer, thereby making the electric behaviors of the elements on the same substrate very unstable. In order to obtain a smoother surface of the polysilicon layer, the prior art still utilizes the excimer laser annealing method to convert the amorphous silicon into the polysilicon.
FIG. 1 is a schematic illustration showing a conventional semiconductor structure having a multilayer of polysilicon. As shown in FIG. 1, a patterned insulating layer 4, such as an oxide layer, is formed on a substrate 2. Then, an amorphous silicon layer is deposited above the patterned insulating layer 4. Next, an excimer laser annealing method is used to convert the amorphous silicon layer into a polysilicon layer 6. Although using the excimer laser annealing method can form a polysilicon surface with a low roughness, the formed die is smaller (refer to the attached FIG. 1(b) and attached FIG. 2(b)), the carrier mobility is low, and the electric behavior is poor when it serves as an element on the active layer.
Therefore, it is an important object of the researcher to develop a polysilicon layer with a specific direction of the grain boundary and a low surface roughness such that the element applied with the same can have high carrier mobility and a good and stable electric behavior.